s3c2440特殊寄存器

导读:运用一个CPU,关键就是掌握它的指令集和特殊寄存器组。能了解两者,再一结合,就OK了。s3c2440特殊寄存器MemoryControllerBWSCON0X48000000←WR/WBusWidth&WaitStatusControlBANKCON00X48000004BootROMControlBANKCON10X48000008BANK1Control

s3c2440特殊寄存器

运用一个CPU,关键就是掌握它的指令集和特殊寄存器组。 能了解两者,再一结合,就OK了。

s3c2440特殊寄存器

Memory Controller

BWSCON 0X48000000 ← W R/W Bus Width & Wait Status Control BANKCON0 0X48000004 Boot ROM Control BANKCON1 0X48000008 BANK1 Control BANKCON2 0X4800000C BANK2 Control BANKCON3 0X48000010 BANK3 Control BANKCON4 0X48000014 BANKCON5 0X48000018 BANKCON6 0X4800001C BANKCON7 0X48000020 REFRESH 0X48000024 BANKSIZE 0X48000028 MRSRB6 0X4800002C MRSRB7 0X48000030 USB Host Controller

HcRevision 0x49000000 ← W HcControl 0x49000004 HcCommonStatus 0x49000008 HclnterruptStatus 0x4900000c HclnterruptEnable 0x49000010 HclnterruptDisable 0x49000014

HcHCCA 0x49000018 HcPeriodCuttentED 0x4900001c HcControlHeadED 0x49000020 HcControlCurrentED 0x49000024 HcBulkHeadED 0x49000028 HcBulkCurrentED 0x4900002c HcDoneHead 0x49000030

HcRmInterval 0x49000034 HcFmRemaining 0x49000038 HcFmNumber 0x4900003C HcPeriodicStart 0x49000040 HcLSThreshold 0x49000044

HcRhDescriptorA 0x49000048 HcRhDescriptorB 0x4900004C HcRhStatus 0x49000050 HcRhPortStatus1 0x49000054 HcRhPortStatus2 0x49000058 Interrupt Controller

SRCPND 0X4A000000 ← W BANK4 Control BANK5 Control BANK6 Control BANK7 Control

DRAM/SDRAM Refresh Control Flexible Bank Size

Mode register set for SDRAM BANK6 Mode register set for SDRAM BANK7 Control and Status Group Memory Pointer Group Frame Counter Group Root Hub Group R/W Interrupt Request Status

INTMOD 0X4A000004 W Interrupt Mode Control INTMSK 0X4A000008 R/W Interrupt Mask Control PRIORITY 0X4A00000C W IRQ Priority Control INTPND 0X4A000010 R/W Interrupt Request Status INTOFFSET 0X4A000014 R Interrupt request source offset SUBSRCPND 0X4A000018 R/W Sub source pending INTSUBMSK 0X4A00001C R/W Interrupt sub mask DMA

DISRC0 0x4B000000 ← W R/W DMA 0 Initial Source DISRCC0 DIDST0 DIDSTC0 DCON0 DSTAT0 DCSRC0 DCDST0 DMASKTRIG0 DISRC1 DISRCC1 DIDST1 DIDSTC1 DCON1 DSTAT1 DCSRC1 DCDST1 DMASKTRIG1 DISRC2 DISRCC2 DIDST2 DIDSTC2 DCON2 DSTAT2 DCSRC2 DCDST2 DMASKTRIG2 DISRC3 DISRCC3 DIDST3 DIDSTC3 DCON3 DSTAT3 DCSRC3 DCDST3 DMASKTRIG3 0x4B000004 DMA 0 Initial Source Control 0x4B000008 DMA 0 Initial Destination

0x4B00000C DMA 0 Initial Destination Control 0x4B000010 DMA 0 Control 0x4B000014 R DMA 0 Count 0x4B000018 DMA 0 Current Source 0x4B00001C DMA 0 Current Destination 0x4B000020 R/W DMA 0 Mask Trigger 0x4B000040 DMA 1 Initial Source 0x4B000044 DMA 1 Initial Source Control 0x4B000048 DMA 1 Initial Destination

0x4B00004C DMA 1 Initial Destination Control 0x4B000050 DMA 1 Control 0x4B000054 R DMA 1 Count 0x4B000058 DMA 1 Current Source

0x4B00005C DMA 1 Current Destination 0x4B000060 R/W DMA 1 Mask Trigger 0x4B000080 DMA 2 Initial Source 0x4B000084 DMA 2 Initial Source Control 0x4B000088 DMA 2 Initial Destination

0x4B00008C DMA 2 Initial Destination Control 0x4B000090 DMA 2 Control 0x4B000094 R DMA 2 Count 0x4B000098 DMA 2 Current Source 0x4B00009C DMA 2 Current Destination 0x4B0000A0 R/W DMA 2 Mask Trigger 0x4B0000C0 ← W R/W DMA 3 Initial Source 0x4B0000C4 DMA 3 Initial Source Control 0x4B0000C8 DMA 3 Initial Destination

0x4B0000CC DMA 3 Initial Destination Control 0x4B0000D0 DMA 3 Control 0x4B0000D4 R DMA 3 Count 0x4B0000D8 DMA 3 Current Source 0x4B0000DC DMA 3 Current Destination 0x4B0000E0 R/W DMA 3 Mask Trigger

Clock & Power Management

LOCKTIME 0x4C000000 ← W R/W PLL Lock Time Counter MPLLCON 0x4C000004 MPLL Control UPLLCON 0x4C000008 UPLL Control

CLKCON 0x4C00000C Clock Generator Control CLKSLOW 0x4C000010 Slow Clock Control CLKDIVN 0x4C000014 Clock divider Control

CAMDIVN 0x4C000018 Camera Clock divider Control LCD Controller

LCDCON1 0X4D000000 LCDCON2 0X4D000004 LCDCON3 0X4D000008 LCDCON4 0X4D00000C LCDCON5 0X4D000010 LCDSADDR1 0X4D000014 LCDSADDR2 0X4D000018 LCDSADDR3 0X4D00001C REDLUT 0X4D000020 GREENLUT 0X4D000024 BLUELUT 0X4D000028 DITHMODE 0X4D00004C TPAL 0X4D000050 LCDINTPND 0X4D000054 LCDSRCPND 0X4D000058 LCDINTMSK 0X4D00005C TCONSEL 0X4D000060 NAND Flash

NFCONF 0x4E000000 NFCONT 0x4E000004 NFCMD 0x4E000008 NFADDR 0x4E00000C NFDATA 0x4E000010 NFMECC0 0x4E000014 NFMECC1 0x4E000018 NFSECC 0x4E00001C NFSTAT 0x4E000020 NFESTAT0 0x4E000024 NFESTAT1 0x4E000028 NFMECC0 0x4E00002C NFMECC1 0x4E000030 NFSECC 0x4E000034 NFSBLK 0x4E000038 NFEBLK 0x4E00003C ← W R/W LCD Control 1 LCD Control 2 LCD Control 3 LCD Control 4 LCD Control 5

STN/TFT: Frame Buffer Start Address1 STN/TFT: Frame Buffer Start Address2 STN/TFT: Virtual Screen Address Set STN: Red Lookup Table STN: Green Lookup Table STN: Blue Lookup Table STN: Dithering Mode TFT: Temporary Palette LCD Interrupt Pending LCD Interrupt Source LCD Interrupt Mask

TCON(LPC3600/LCC3600) Control ← W R/W NAND Flash Configuration NAND Flash Control NAND Flash Command NAND Flash Address NAND Flash Data

NAND Flash Main area ECC0/1 NAND Flash Main area ECC2/3 NAND Flash Spare area ECC NAND Flash Operation Status NAND Flash ECC Status for I/O[7:0] NAND Flash ECC Status for I/O[15:8] R NAND Flash Main area ECC0 status NAND Flash Main Area ECC1 status NAND Flash Spare Area ECC status R/W NAND Flash start block address NAND Flash end block address

Camera Interface

CISRCFMT 0x4F000000 ← W RW Input Source Format CIWDOFST 0x4F000004 Window offset register CIGCTRL 0x4F000008 Global control register

CICOYSA1 0x4F000018 Y 1st frame start address for codec DMA CICOYSA2 0x4F00001C Y 2nd frame start address for codec DMA CICOYSA3 0x4F000020 Y 3rd frame start address for codec DMA CICOYSA4 0x4F000024 Y 4th frame start address for codec DMA CICOCBSA1 0x4F000028 Cb 1st frame start address for codec DMA CICOCBSA2 0x4F00002C CICOCBSA3 0x4F000030 CICOCBSA4 0x4F000034 CICOCRSA1 0x4F000038 CICOCRSA2 0x4F00003C CICOCRSA3 0x4F000040 CICOCRSA4 0x4F000044 CICOTRGFMT 0x4F000048 CICOCTRL 0x4F00004C CICOSCPRERATIO 0x4F000050 CICOSCPREDST 0x4F000054 CICOSCCTRL 0x4F000058 CICOTAREA 0x4F00005C CICOSTATUS 0x4F000064 CIPRCLRSA1 0x4F00006C CIPRCLRSA2 0x4F000070 CIPRCLRSA3 0x4F000074 CIPRCLRSA4 0x4F000078 CIPRTRGFMT 0x4F00007C CIPRCTRL 0x4F000080 CIPRSCPRERATIO 0x4F000084 CIPRSCPREDST 0x4F000088 CIPRSCCTRL 0x4F00008C CIPRTAREA 0x4F000090 CIPRSTATUS 0x4F000098 CIIMGCPT 0x4F0000A0 UART

ULCON0 0x50000000 ←UCON0 0x50000004 UFCON0 0x50000008 UMCON0 0x5000000C UTRSTAT0 0x50000010 UERSTAT0 0x50000014 UFSTAT0 0x50000018 UMSTAT0 0x5000001C Cb 2nd frame start address for codec DMA Cb 3rd frame start address for codec DMA Cb 4th frame start address for codec DMA Cr 1st frame start address for codec DMA Cr 2nd frame start address for codec DMA Cr 3rd frame start address for codec DMA Cr 4th frame start address for codec DMA Target image format of codec DMA Codec DMA control related Codec pre-scaler ratio control Codec pre-scaler destination format Codec main-scaler control Codec scaler target area Codec path status

RGB 1st frame start address for preview DMA RGB 2nd frame start address for preview DMA RGB 3rd frame start address for preview DMA RGB 4th frame start address for preview DMA Target image format of preview DMA Preview DMA control related Preview pre-scaler ratio control Preview pre-scaler destination format Preview main-scaler control Preview scaler target area Preview path status

Image capture enable command W R/W UART 0 Line Control UART 0 Control UART 0 FIFO Control UART 0 Modem Control R UART 0 Tx/Rx Status UART 0 Rx Error Status UART 0 FIFO Status UART 0 Modem Status

UTXH0 0x50000023 0x50000020 B W UART 0 Transmission Hold URXH0 0x50000027 0x50000024 R UART 0 Receive Buffer UBRDIV0 0x50000028 ← W R/W UART 0 Baud Rate Divisor ULCON1 0x50004000 UART 1 Line Control UCON1 0x50004004 UART 1 Control UFCON1 0x50004008 UART 1 FIFO Control UMCON1 0x5000400C UART 1 Modem Control UTRSTAT1 0x50004010 R UART 1 Tx/Rx Status UERSTAT1 0x50004014 UART 1 Rx Error Status UFSTAT1 0x50004018 UART 1 FIFO Status UMSTAT1 0x5000401C UART 1 Modem Status

UTXH1 0x50004023 0x50004020 B W UART 1 Transmission Hold URXH1 0x50004027 0x50004024 R UART 1 Receive Buffer UBRDIV1 0x50004028 ← W R/W UART 1 Baud Rate Divisor ULCON2 0x50008000 UART 2 Line Control UCON2 0x50008004 UART 2 Control UFCON2 0x50008008 UART 2 FIFO Control UTRSTAT2 0x50008010 R UART 2 Tx/Rx Status UERSTAT2 0x50008014 UART 2 Rx Error Status UFSTAT2 0x50008018 UART 2 FIFO Status

UTXH2 0x50008023 0x50008020 B W UART 2 Transmission Hold URXH2 0x50008027 0x50008024 R UART 2 Receive Buffer UBRDIV2 0x50008028 ← W R/W UART 2 Baud Rate Divisor

PWM Timer

TCFG0 0x51000000 ← W R/W Timer Configuration TCFG1 0x51000004 Timer Configuration TCON 0x51000008 Timer Control TCNTB0 0x5100000C Timer Count Buffer 0 TCMPB0 0x51000010 Timer Compare Buffer 0 TCNTO0 0x51000014 R Timer Count Observation 0 TCNTB1 0x51000018 R/W Timer Count Buffer 1 TCMPB1 0x5100001C Timer Compare Buffer 1 TCNTO1 0x51000020 R Timer Count Observation 1 TCNTB2 0x51000024 R/W Timer Count Buffer 2 TCMPB2 0x51000028 Timer Compare Buffer 2 TCNTO2 0x5100002C R Timer Count Observation 2 TCNTB3 0x51000030 R/W Timer Count Buffer 3 TCMPB3 0x51000034 Timer Compare Buffer 3 TCNTO3 0x51000038 R Timer Count Observation 3 TCNTB4 0x5100003C R/W Timer Count Buffer 4 TCNTO4 0x51000040 R Timer Count Observation 4 USB Device

FUNC_ADDR_REG 0x52000143 0x52000140 B R/W Function Address

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